1. Field of the Invention
The present invention relates to an electrode passivation layer of a semiconductor device and a method for forming the same and, more particularly, to an electrode passivation layer of a semiconductor device having improved corrosion-resistance and oxidation-resistance and a method for forming the same.
2. Discussion of the Related Art
Electrode wiring technology in a MOS (Metal Oxide Semiconductor) device is divided into aluminum wires connecting gate electrodes, source/drain impurity diffusion regions, contact holes, and cells.
In scaling, the characteristic of electrode wires is affected by the sizes of devices and the 1/K reduction of power supply voltage. Regarding gate electrodes, increasing a resistance by K times results in the increase of signal transmission delay time, thereby decreasing the speed of device operation. Regarding contact holes, resistance is increased by K.sup.2 times and current density is increased by K times, thereby deteriorating the reliability of wires. Regarding wires, resistance is increased by K times and current density is increased by K times, thereby deteriorating the reliability of wiring by electromigration.
Since the material for a gate electrode is used for both the gate electrode and identical wires forming word lines of a memory, the material should have a low resistivity. In particular, as design is being submicronized, RC delays are being increased based on increases in wiring resistance R caused by miniaturization and increases in capacitance caused by reduction in wire pitch.
For instance, if the polysilicon used as gate electrode is also used for a design standard with lines that are less than 1 .mu.m wide, the reliability and operation speed become inferior. These effects follow because resistivity of doped polysilicon is bigger than 200 .mu..OMEGA./cm. Therefore, in order to reduce the resistance, a WSi.sub.x film (refracting silicide) having a good step coverage and a resistivity of about 100 .mu..OMEGA./cm is deposited on polysilicon to be used as an electrode. That is, polysilicide (polysilicon+refractory silicide) is used as an electrode. However, as described previously, it is known that a WSi.sub.x having a resistivity of about 100 .mu..OMEGA./cm loses its effectiveness if the electrode is designed with lines having a width of less than 0.5 .mu.m.
In order to solve this problem, active research and development has been conducted using tungsten W having a resistivity of less than 10 .mu..OMEGA./cm, TiSi.sub.2 having a resistivity of less than 20 .mu..OMEGA./cm, COSi.sub.2 having a resistivity of less than 20 .mu..OMEGA./cm, and TiN having a resistivity of 30 .mu..OMEGA./cm. In addition, a process for forming a passivation film corresponding to the process for forming an electrode using the aforementioned material of wires is essential. That is, the technology for forming a passivation film is necessary to achieve the improved characteristic of a device by subjecting the surface of a semiconductor device to a certain type of treatment and high reliability by restraining the fluctuation for a long term. As it were, this technology is a defensive one. But recently, it is necessitated to positively improve the total level of process.
The technology necessary to form a passivation film is subdivided into three classifications: interfacial protection, wire protection, and pad protection. Silicon oxide and silicon nitride are mainly used to form various insulating film and glass layers in their temperature ranges.
In particular, a wire passivation film should experience limited reactions to metal, adhere well to surface, block the effects of moisture and contamination, experience few mechanical flaws such as cracks or pinholes, be resilient to damage, and have good processing characteristics. Above all, it should have a good stability and no deformation.
A conventional method for forming an electrode of a semiconductor device will be described with reference to the accompanying drawings.
FIGS. 1A to 1D are cross-sectional views showing process steps of a conventional method for forming an electrode of a semiconductor device.
Referring initially to FIG. 1A, a gate oxide film 2, a doped polysilicon layer 3, and a WSi.sub.x film 4 are successively formed on a semiconductor substrate 1. The polysilicon layer 3 is doped with B, P, As, and so forth. After forming the doped polysilicon layer 3, a cleaning process using HF is performed over the entire surface and then a chemical reaction using WF.sub.6 +SiH.sub.2 Cl.sub.2, thereby forming a silicide film.
Referring to FIG. 1B, a cap oxide film 5 is formed on the WSi.sub.x film 4. Next, a photoresist film PR is coated on the entire surface of the cap oxide film 5. The photoresist film PR is subjected to an exposure and development process to define a gate electrode region over only the gate electrodes.
Referring to FIG. 1C, using the patterned photoresist film PR as a mask, the cap oxide film 5, the WSi.sub.x film 4, the doped polysilicon layer 3 and the gate oxide film 2 are successively etched, thus forming a gate electrode 3a. Thereafter, an annealing process is performed on the entire surface to achieve stabilization of the surface of the substrate and silicide reaction. That is, right after the etch process using the photoresist film PR as a mask, the structure is put into a furnace to perform the annealing process.
The annealing process is performed in the presence of O.sub.2 and N.sub.2 to restore damage of gate oxide film 2 caused by the etching process used to pattern the gate electrode 3a. More specifically, if an oxide film is used as the gate insulating film between the gate electrode 3a and the substrate 1, the annealing process is performed in the presence of O.sub.2. Otherwise, if a nitride film is used as the gate insulating film, it is performed in the presence of N.sub.2.
That is, an oxide film or a nitride film (not shown) is formed between the gate electrode 3a and the WSi.sub.x film 4 by bonding silicon atoms of the gate electrode 3a with O.sub.2 or N.sub.2 passing through the grain boundary of the WSi.sub.x film 4 while the annealing process is being performed in the presence of O or N, or while the WSi.sub.x film 4, which is a refractory metal, and the cap oxide film 5 are being formed.
The above described silicide reaction process is performed to form the polycide, thereby realizing a low resistance of the gate electrode 3a by improving the adhesion of gate electrode 3a and the WSi.sub.x film 4.
Referring to FIG. 1D, a CVD oxide film is deposited by a CVD (chemical vapor deposition) process on the entire surface including the cap oxide film 5. The CVD oxide film is then etched-back by an RIE (reactive ion etch) process, thereby forming sidewall spacers 6 on both sides of the cap oxide film 5, the WSi.sub.x film 4, the gate electrode 3a, and the gate oxide film 2.
As described above, the conventional electrode having a polycide structure (gate electrode 3a+WSi.sub.x film 4) is protected by the cap oxide film 5 and the sidewall spacers 6 made of a CVD oxide film.
FIG. 2 is a cross-sectional view of a structure showing abnormal oxidation in forming an electrode of a conventional semiconductor device.
The abnormal oxidation is generated when an etch process to form the gate electrode 3a is performed using the patterned photoresist film PR as a mask to selectively remove the cap oxide film 5, the WSi.sub.x film 4, the doped polysilicon layer 3, and the gate oxide film 2, or when the whole structure is being moved to a furnace for silicide reaction.
To etch using the photoresist film PR as a mask, a liquid etchant such as H2PO.sub.2 or H.sub.2 O.sub.2 is used. A cleaning process is then performed to clean the etchant. A presence of O.sub.2 is generated around the WSi.sub.x film 4 because the etchant contains O.sub.2. Because of this O.sub.2 presence, a material having O.sub.2 is produced on sides; of the WSi.sub.x film 4.
Also, while the whole structure is being moved to the furnace to improve the adhesion of the WSi.sub.x film 4 and the gate electrode 3a via annealing, it is exposed to the O2 presence so that a material including O.sub.2 is formed on sides of the WSi.sub.x film 4. This material, including O.sub.2, is bonded to tungsten in WSi.sub.x film 4 during the annealing process for silicide reaction so that an abnormal oxide film 7, including tungsten atoms, is generated on sides of the WSi.sub.x film 4. This is generated during the annealing process using the O.sub.2 presence for recovering the damage of the gate oxide film 2.
FIG. 3 is a cross-sectional view of a structure showing a peeling 8 in forming an electrode of a conventional semiconductor device. This peeling 8 is generated at the interface of gate electrode 3a and WSi.sub.x 4, which is a refractory metal silicide.
This peeling 8 is generated by bonding silicon atoms in the gate electrode 3a and nitride atoms or oxygen atoms passing through the grain boundary of the WSi.sub.x film 4 during the annealing process in the presence of N.sub.2 or O.sub.2. That is, since a thin nitride or oxide film is formed at the interface of the WSi.sub.x film 4 and the gate electrode 3a by bonding silicon atoms and either nitrogen atoms or oxygen atoms, the bond between the WSi.sub.x film 4 and the gate electrode 3a becomes weakened, thereby generating the peeling 8 at that interface.
As described in FIGS. 2 and 3, an abnormal oxide film is generated on sides of the WSi.sub.x film and the peeling is generated at the interface of the WSi.sub.x film and the gate electrode when a WSi.sub.x film is formed on a gate electrode to improve the performance of an electrode, or when a refractory metal layer such as W, a refractory silicide such as TiSi.sub.2 or COSi.sub.2, or a refractory nitride metal layer such as TiN is used to form an electrode.
The conventional method for forming an electrode passivation film of a semiconductor device has the following problems.
First, though a polycide structure is adopted to improve the performance of an electrode, silicide reaction on the side of a silicide film formed on a gate electrode is generated and an abnormal oxide film is formed by bondage with oxygen atoms in an etching process, thereby damaging the silicide film. Thus, the reliability is deteriorated. Further, since the abnormal oxide film is used as a mask in an ion-implanting process, this process may be inexactly performed and the reliability may become inferior.
Furthermore, since the silicide film is formed on the gate electrode, silicon atoms in the gate electrode and either oxygen or nitrogen are bonded in an annealing process in the presence of N.sub.2 or O.sub.2 to form a cap oxide film on the silicide film. As a result, peeling at the interface of the silicide film and the gate electrode is generated, and thus the yield and reliability of semiconductor device are deteriorated.